Introducing XPU Grasshopper, an AI chip co-designed with AI for the era of recursive self-improvement

Today we are announcing XPU Grasshopper, our XPU architecture running AI models end to end, and opening pre-orders for its devkit, XPU Grasshopper (KU040).

A conventional chip takes a hundred engineers and years of handoffs from architecture to RTL to software. Grasshopper takes a handful of engineers and autonomous AI agents that co-design the hardware and the software together. The agents rewrite kernels, rework the hardware overlay, schedule and run the FPGA builds themselves, and test each new image on the full model. Whatever makes the model faster stays, and becomes the starting point for the next build.

That took Grasshopper from zero to running models in weeks. The first tokens came out on June 30, at 0.06 tokens per second. On October 2 the same model ran at 51 tokens per second, 816x faster in 13 weeks.

On gemma-3-1b-it, four tiles on an FPGA run at 51 tok/s using 89% of their peak memory bandwidth. For reference, an NVIDIA Jetson Orin Nano Super runs the same model at 41 tok/s. The devkit puts the same architecture on your desk, in a limited edition of 100 numbered boards.

The name is inspired by the SpaceX Grasshopper, the test rocket that learned to take off and land again years before SpaceX landed its first orbital booster. XPU Grasshopper is that first hop for polymorphic computing.

The Grasshopper architecture

In AI, almost all of the energy goes to moving data around, and very little to the math itself. Moving a byte costs far more than computing with it, so Grasshopper keeps the data next to the math. It is a mesh of Mutation Tile Units (MTUs), each with its own scratchpad right beside its compute, and DRAM sits at the edges of the mesh.

The dataflow reconfigures for each model instead of freezing one paradigm into silicon. It is also simple enough for AI agents to program, which is what makes the co-design loop possible.

The build we benchmark is four tiles in a 2x2 mesh on an AMD VU47P. Gen 1 silicon is the same architecture with 196 tiles.

Co-designed with AI

The curve below is that loop running on gemma-3-1b-it at INT8, batch 1. It is the same model the whole way, measured end to end on the 2x2 mesh, and every point is the best run of that day.

What moved the curve

• June 30. First tokens, on a single tile.
• August 19. First run on the 2x2 mesh, with DRAM online.
• September 7. The AI finds a hardware optimization, and the next run goes from 12 to 21 tok/s.
• September 8. Its kernel optimizations take that image from 21 to 25 tok/s.
• September 14. A second hardware find takes the same kernels from 28 to 35 tok/s.
• September 14 to October 2. The loop keeps running, from 35 to 51 tok/s.

Our engineers set the targets and the architecture. Within them, the AI proposed these changes, built them, measured them, and kept the ones that made the model faster. This is an early form of recursive self-improvement, with AI improving the hardware that AI runs on.

Measured end to end

When a single user is decoding, every machine is limited by memory, because each token reads every weight once. So next to tokens per second we also show how much of each machine's peak memory bandwidth it actually uses (MBU).

XPU Grasshopper (KU040)

The devkit is a PCIe card with two AMD KU040 FPGAs linked by SerDes, running the Grasshopper 2x2. Everything above the hardware ships open source, from the SDK down to the runtime, the driver, and libxpu. You own your intelligence. The runtime opens the card at /dev/xpu/N, and from there the whole device is yours to program. And since it is an FPGA board underneath, you can use it as one too.

It is a limited edition of 100 numbered boards. Pre-orders are 20% off, reserved with a fully refundable deposit, and come with batch #0 of early API and SSH access to the cluster. Boards ship in February 2027.

What is next

Next is a cluster of XPUs you can use over an API, then Gen 1 silicon, and then Monolith. Monolith connects many XPUs into one machine that behaves as one chip, and runs the whole loop on the same silicon, from agents to experience generation to training.

The loop that made Grasshopper 816x faster keeps running, and every turn improves the hardware that the next turn runs on.

Gen 1 for clusters and enterprise

Enterprise and cluster inquiries are for Gen 1 silicon, not the devkit. Tell us your power budget and what you want to run, and we will get back to you.

Questions or partnerships? Write to us at contact@zscc.ai.

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